Artificial intelligence news.
Straight from the original announcements.

Expedera and Cadence Pair NPUs for Edge AI Inference

November 9, 2026, 14:47Source: PR Newswire
Expedera and Cadence Pair NPUs for Edge AI Inference
Image: PR Newswire

Expedera and Cadence have demonstrated a combined AI subsystem that pairs Expedera's Origin™ Evolution NPU with Cadence's Tensilica NeuroEdge 130 AI Co-Processor. The pre-silicon simulation showed how workloads can be distributed across both IP blocks for edge AI inference.

Key points
  • Expedera paired its Origin™ Evolution NPU with Cadence's Tensilica NeuroEdge 130 AICP.
  • A pre-silicon simulation demonstrated workload distribution across both IP blocks.
  • The solution is designed for edge nodes, smartphones, automotive systems and data centers.
  • The approach can be extended to other Tensilica DSPs.
  • Expedera says its NPU solutions are deployed in more than 10 million consumer devices.

Pre-silicon simulation tests combined architecture

The companies said the collaboration is intended to create a validated AI subsystem IP for edge inference systems. The demonstration used Expedera's customizable, packet-based NPU architecture alongside the scalable AI compute capabilities of the Tensilica NeuroEdge 130 AICP.

According to Expedera, the combined solution is designed to improve performance and power efficiency while reducing latency, cost and complexity. The simulation demonstrated AI workload distribution and execution across the two IP blocks before silicon production.

Expedera said the approach can be extended to other Tensilica DSPs. That gives system designers a way to consider the same type of NPU and co-processor pairing across a broader set of chip designs.

Support planned across several device categories

The AICP-NPU combination is intended to support inference designs across edge nodes, smartphones, automotive systems and data center applications. The companies position the architecture as a way to add dedicated AI acceleration while keeping the subsystem configurable.

Cadence said the Tensilica NeuroEdge 130 AICP can complement Expedera's NPU by assisting with pre-processing, post-processing and operator fallback while executing AI networks. In the company's description, this division of tasks helps cover end-to-end inference workloads as AI processing moves from cloud systems toward edge devices.

“The Tensilica NeuroEdge 130 AICP perfectly complements Expedera's customizable NPU IP, assisting with pre/post-processing and operator fallback while executing cutting-edge AI networks,” said Amol Borkar, group director of product management and marketing for the Tensilica Products Group at Cadence.

Companies present a path toward customized edge AI chips

Expedera's chief scientist, Sharad Chole, said the pairing gives developers “a validated way to add scalable, efficient AI acceleration to the workflows they already use.” He also said the combined subsystem, together with agentic AI workflows used to deliver customized IP, could provide customers with a faster, lower-risk path to production edge AI tailored to their performance and power requirements.

Expedera's Origin™ Evolution NPU IP was recently named Best Edge AI Processor IP in the 2026 Edge AI and Vision Product of the Year Awards. The company also says its Origin™ Evolution NPU solutions are deployed in more than 10 million consumer devices across applications including edge nodes, smartphones, automotive systems and data centers.

The teams are scheduled to meet attendees at ICCAD-Expo 2026 in Beijing on November 19, 20, where Expedera will be at booth F091. For users of edge AI hardware, the announcement points to a pre-validated combination of configurable IP blocks rather than a standalone processor, potentially simplifying the design of systems that must balance inference performance, power consumption and deployment complexity.

ExpederaCadenceOrigin Evolution NPUTensilica NeuroEdge 130 AI Co-Processorchipssmart devicesautonomous drivingdata centers

Related news

Microsoft reports up to 4.15x faster EDA workloads on Cobalt 200
Chips and infrastructureNovember 5, 2026, 17:00

Microsoft reports up to 4.15x faster EDA workloads on Cobalt 200

Microsoft says its Azure Cobalt 200 infrastructure delivered between 1.30x and 4.15x the performance of Cobalt 100 across electronic design automation workloads. The…

Longsys to show industrial-grade mSSD and edge AI storage at electronica 2026
Chips and infrastructureNovember 5, 2026, 07:53

Longsys to show industrial-grade mSSD and edge AI storage at electronica 2026

Longsys will unveil its first industrial-grade, wide-temperature mSSD at electronica 2026 in Munich, alongside a range of automotive and industrial storage products…

Longsys to Unveil Industrial-Grade Wide-Temperature mSSD at electronica 2026
Chips and infrastructureNovember 3, 2026, 08:00

Longsys to Unveil Industrial-Grade Wide-Temperature mSSD at electronica 2026

Longsys will present its first industrial-grade, wide-temperature mSSD at electronica 2026 in Munich, alongside a broader range of automotive and industrial storage for…